SoC Security Evaluation: Reflections on Methodology and Tooling

Nassim Corteggiani; Giovanni Camurati; Marius Muench; Sebastian Poeplau; Aurelien Francillon

doi:10.1109/MDAT.2020.3013827

SoC Security Evaluation: Reflections on Methodology and Tooling

Nassim Corteggiani, Giovanni Camurati, Marius Muench, Sebastian Poeplau, Aurelien Francillon

Computer Science

Research output: Contribution to journal › Article › peer-review

Abstract

This article details a methodology to find bugs across multiple abstraction layers of the system, specifically at the hardware-software boundary. The article describes how existing tools can help with such methodology and limitations.

Original language	English
Pages (from-to)	7-13
Number of pages	7
Journal	IEEE Design and Test
Volume	38
Issue number	1
Early online date	3 Aug 2020
DOIs	https://doi.org/10.1109/MDAT.2020.3013827
Publication status	Published - Feb 2021

Keywords

security evaluation
System-on-Chip
dynamic analysis
HardFails

Access to Document

10.1109/MDAT.2020.3013827

Cite this

@article{b957cb0c83124201b450011205cc347e,

title = "SoC Security Evaluation: Reflections on Methodology and Tooling",

abstract = "This article details a methodology to find bugs across multiple abstraction layers of the system, specifically at the hardware-software boundary. The article describes how existing tools can help with such methodology and limitations.",

keywords = "security evaluation, System-on-Chip, dynamic analysis, HardFails",

author = "Nassim Corteggiani and Giovanni Camurati and Marius Muench and Sebastian Poeplau and Aurelien Francillon",

year = "2021",

month = feb,

doi = "10.1109/MDAT.2020.3013827",

language = "English",

volume = "38",

pages = "7--13",

journal = "IEEE Design and Test",

issn = "2168-2356",

publisher = "IEEE Computer Society",

number = "1",

}

TY - JOUR

T1 - SoC Security Evaluation

T2 - Reflections on Methodology and Tooling

AU - Corteggiani, Nassim

AU - Camurati, Giovanni

AU - Muench, Marius

AU - Poeplau, Sebastian

AU - Francillon, Aurelien

PY - 2021/2

Y1 - 2021/2

N2 - This article details a methodology to find bugs across multiple abstraction layers of the system, specifically at the hardware-software boundary. The article describes how existing tools can help with such methodology and limitations.

AB - This article details a methodology to find bugs across multiple abstraction layers of the system, specifically at the hardware-software boundary. The article describes how existing tools can help with such methodology and limitations.

KW - security evaluation

KW - System-on-Chip

KW - dynamic analysis

KW - HardFails

U2 - 10.1109/MDAT.2020.3013827

DO - 10.1109/MDAT.2020.3013827

M3 - Article

SN - 2168-2356

VL - 38

SP - 7

EP - 13

JO - IEEE Design and Test

JF - IEEE Design and Test

IS - 1

ER -

SoC Security Evaluation: Reflections on Methodology and Tooling

Abstract

Keywords

Access to Document

Fingerprint

Cite this