Transparent linking of compiled software and synthesized hardware

Research output: Chapter in Book/Report/Conference proceedingConference contribution


  • David B. Thomas
  • Shane T. Fleming
  • George A. Constantinides
  • Dan Ghica

Colleges, School and Institutes

External organisations

  • Imperial College London


Modern heterogeneous devices contain tightly coupled CPU and FPGA logic, allowing low latency access to accelerators. However, designers of the system need to treat accelerated functions specially, with device specific code for instantiating, configuring, and executing accelerators. We present a system level linker, which allows functions in hardware and software to be linked together to create heterogeneous systems. The linker works with post-compilation and post-synthesis components, allowing the designer to transparently move functions between devices simply by linking in either hardware or software object files. The linker places no special emphasis on the software, allowing computation to be initiated from within hardware, with function calls to software to provide services such as file access. A strong type-system ensures that individual code artifacts can be written using the conventions of that domain (C, HLS, VHDL), while allowing direct and transparent linking.


Original languageEnglish
Title of host publicationProceedings - Design, Automation and Test in Europe, DATE 2015
Publication statusPublished - 22 Apr 2015
Event2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015 - Grenoble, France
Duration: 9 Mar 201513 Mar 2015


Conference2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015

ASJC Scopus subject areas