Reconfigurable Computing for Speech Recognition: Preliminary Findings

Research output: Chapter in Book/Report/Conference proceedingOther chapter contribution

Authors

Colleges, School and Institutes

Abstract

Continuous real-time speech recognition is a highly computationally-demanding task, but one which can take good advantage of a parallel processing system. To this end, we describe proposals for, and preliminary findings of, research in implementing in programmable logic the decoder part of a speech recognition system. Recognition via Viterbi decoding of Hidden Markov Models is outlined, along with details of current implementations, which aim to exploit properties of the algorithm that could make it well-suited for devices such as FPGAs. The question of how to deal with limited resources, by reconfiguration or otherwise, is also addressed.

Bibliographic note

The original publication is available at www.springerlink.com

Details

Original languageEnglish
Title of host publicationField-Programmable Logic and Applications. The Roadmap to Reconfigurable Computing: 10th International Conference, FPL 2000, Villach, Austria, August 27-30, 2000. Proceedings
Publication statusPublished - 2000

Publication series

NameLecture Notes in Computer Science
PublisherSpringer Verlag
Volume1896
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349