High temperature nanoscratching of single crystal silicon under reduced oxygen condition

Research output: Contribution to journalArticle

Authors

Colleges, School and Institutes

Abstract

In-situ high temperature nanoscratching of Si(110) wafer under reduced oxygen condition was carried out for the first time using a Berkovich tip with a ramp load at low and high scratching speeds. Ex-situ Raman spectroscopy and AFM analysis were performed to characterize high pressure phase transformation, nanoscratch topography and nanoscratch hardness. No remnants of high pressure silicon phases were observed along all the nanoscratch residual tracks in high temperature nanoscratching, whereas in room temperature nanoscratching, phase transformation showed a significant dependence on the applied load and scratching speed i.e. the deformed volume inside the nanoscratch made at room temperature was comprised of Si-I, Si-XII and Si-III above different threshold loads at low and high scratching speeds. Further analysis through AFM measurements demonstrated that the scratch hardness and residual scratch morphologies i.e. scratch depth, scratch width and total pile-up heights are greatly affected by the wafer temperature and scratching speed.

Details

Original languageEnglish
Pages (from-to)385-393
JournalMaterials Science and Engineering A
Volume684
Early online date29 Nov 2016
Publication statusPublished - 27 Jan 2017

Keywords

  • High temperature , Nanoscratching , Single crystal silicon , Polymorphs