A tiny coprocessor for elliptic curve cryptography over the 256-bit NIST prime field
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Authors
Colleges, School and Institutes
External organisations
- KU Leuven
Abstract
Elliptic curve cryptography (ECC) over prime fields offers a wide range of portability since the underlying arithmetic operations that are performed over integers can be supported by general purpose computing devices. This portability helps in designing various ECC based public key protocols. However implementation of a fast enough ECC in tiny electronic devices such as RFID tags, sensor nodes, smart cards etc., is a very challenging design problem since such devices are very limited in terms of resources. In this paper we design the first lightweight ECC architecture over the NIST recommended 256-bit prime field, corresponding to a medium security level of 128-bits. The ECC architecture works as a coprocessor of a 16-bit microcontroller in a memory-mapped configuration. The architecture uses an area of only 5,933 GE on a 130 nm CMOS technology, and needs roughly 6 million clock cycles to calculate a scalar multiplication.
Details
Original language | English |
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Title of host publication | 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID) |
Publication status | Published - 17 Mar 2016 |
Event | 29th International Conference on VLSI Design, VLSID 2016 - Kolkata, India Duration: 4 Jan 2016 → 8 Jan 2016 |
Publication series
Name | VLSI Design, International Conference on |
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ISSN (Electronic) | 2380-6923 |
Conference
Conference | 29th International Conference on VLSI Design, VLSID 2016 |
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Country | India |
City | Kolkata |
Period | 4/01/16 → 8/01/16 |
Keywords
- ASIC, ECC Processor, Elliptic Curve Cryptography, Lightweight, Prime Field