A Memetic Algorithm for VLSI Floorplanning

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A Memetic Algorithm for VLSI Floorplanning. / Tang, M; Yao, Xin.

In: IEEE Transactions on Systems, Man, and Cybernetics, Part B (Cybernetics), Vol. 37, No. 1, 01.01.2007, p. 62-69.

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@article{0b9b4536d5f74386ba045e2c1ad8e1ae,
title = "A Memetic Algorithm for VLSI Floorplanning",
abstract = "Floorplanning is an important problem in very large scale integrated-circuit (VLSI) design automation as it determines the performance, size, yield, and reliability of VLSI chips. From the computational point of view, VLSI floorplanning is an NP-hard problem. In this paper, a memetic algorithm (MA) for a nonslicing and hard-module VLSI floorplanning problem is presented. This MA is a hybrid genetic algorithm that uses an effective genetic search method to explore the search space and an efficient local search method to exploit information in the search region. The exploration and exploitation are balanced by a novel bias search strategy. The MA has been implemented and tested on popular benchmark problems. Experimental results show that the MA can quickly produce optimal or nearly optimal solutions for all the tested benchmark problems.",
keywords = "floorplanning, memetic algorithm (MA), genetic algorithm (GA), very large scale integrated circuit (VLSI), local search",
author = "M Tang and Xin Yao",
year = "2007",
month = jan,
day = "1",
doi = "10.1109/TSMCB.2006.883268",
language = "English",
volume = "37",
pages = "62--69",
journal = "IEEE Transactions on Systems, Man, and Cybernetics, Part B (Cybernetics)",
issn = "1083-4419",
publisher = "Institute of Electrical and Electronics Engineers (IEEE)",
number = "1",

}

RIS

TY - JOUR

T1 - A Memetic Algorithm for VLSI Floorplanning

AU - Tang, M

AU - Yao, Xin

PY - 2007/1/1

Y1 - 2007/1/1

N2 - Floorplanning is an important problem in very large scale integrated-circuit (VLSI) design automation as it determines the performance, size, yield, and reliability of VLSI chips. From the computational point of view, VLSI floorplanning is an NP-hard problem. In this paper, a memetic algorithm (MA) for a nonslicing and hard-module VLSI floorplanning problem is presented. This MA is a hybrid genetic algorithm that uses an effective genetic search method to explore the search space and an efficient local search method to exploit information in the search region. The exploration and exploitation are balanced by a novel bias search strategy. The MA has been implemented and tested on popular benchmark problems. Experimental results show that the MA can quickly produce optimal or nearly optimal solutions for all the tested benchmark problems.

AB - Floorplanning is an important problem in very large scale integrated-circuit (VLSI) design automation as it determines the performance, size, yield, and reliability of VLSI chips. From the computational point of view, VLSI floorplanning is an NP-hard problem. In this paper, a memetic algorithm (MA) for a nonslicing and hard-module VLSI floorplanning problem is presented. This MA is a hybrid genetic algorithm that uses an effective genetic search method to explore the search space and an efficient local search method to exploit information in the search region. The exploration and exploitation are balanced by a novel bias search strategy. The MA has been implemented and tested on popular benchmark problems. Experimental results show that the MA can quickly produce optimal or nearly optimal solutions for all the tested benchmark problems.

KW - floorplanning

KW - memetic algorithm (MA)

KW - genetic algorithm (GA)

KW - very large scale integrated circuit (VLSI)

KW - local search

U2 - 10.1109/TSMCB.2006.883268

DO - 10.1109/TSMCB.2006.883268

M3 - Article

C2 - 17278559

VL - 37

SP - 62

EP - 69

JO - IEEE Transactions on Systems, Man, and Cybernetics, Part B (Cybernetics)

JF - IEEE Transactions on Systems, Man, and Cybernetics, Part B (Cybernetics)

SN - 1083-4419

IS - 1

ER -