A Memetic Algorithm for VLSI Floorplanning

Research output: Contribution to journalArticle

Authors

Colleges, School and Institutes

Abstract

Floorplanning is an important problem in very large scale integrated-circuit (VLSI) design automation as it determines the performance, size, yield, and reliability of VLSI chips. From the computational point of view, VLSI floorplanning is an NP-hard problem. In this paper, a memetic algorithm (MA) for a nonslicing and hard-module VLSI floorplanning problem is presented. This MA is a hybrid genetic algorithm that uses an effective genetic search method to explore the search space and an efficient local search method to exploit information in the search region. The exploration and exploitation are balanced by a novel bias search strategy. The MA has been implemented and tested on popular benchmark problems. Experimental results show that the MA can quickly produce optimal or nearly optimal solutions for all the tested benchmark problems.

Details

Original languageEnglish
Pages (from-to)62-69
Number of pages8
JournalIEEE Transactions on Systems, Man, and Cybernetics, Part B (Cybernetics)
Volume37
Issue number1
Publication statusPublished - 1 Jan 2007

Keywords

  • floorplanning, memetic algorithm (MA), genetic algorithm (GA), very large scale integrated circuit (VLSI), local search