Abstract
Modern heterogeneous devices contain tightly coupled CPU and FPGA logic, allowing low latency access to accelerators. However, designers of the system need to treat accelerated functions specially, with device specific code for instantiating, configuring, and executing accelerators. We present a system level linker, which allows functions in hardware and software to be linked together to create heterogeneous systems. The linker works with post-compilation and post-synthesis components, allowing the designer to transparently move functions between devices simply by linking in either hardware or software object files. The linker places no special emphasis on the software, allowing computation to be initiated from within hardware, with function calls to software to provide services such as file access. A strong type-system ensures that individual code artifacts can be written using the conventions of that domain (C, HLS, VHDL), while allowing direct and transparent linking.
Original language | English |
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Title of host publication | Proceedings - Design, Automation and Test in Europe, DATE 2015 |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Pages | 1084-1089 |
Number of pages | 6 |
Volume | 2015-April |
ISBN (Print) | 9783981537048 |
Publication status | Published - 22 Apr 2015 |
Event | 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015 - Grenoble, France Duration: 9 Mar 2015 → 13 Mar 2015 |
Conference
Conference | 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015 |
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Country/Territory | France |
City | Grenoble |
Period | 9/03/15 → 13/03/15 |
ASJC Scopus subject areas
- General Engineering