Projects per year
Devices with tightly coupled CPUs and FPGA logic allow for the implementation of heterogeneous applications which combine multiple components written in hardware and software languages, including first-party source code and third-party IP. Flexibility in component relationships is important, so that the system designer can move components between software and hardware as the application design evolves. This paper presents a system-level type system and linker, which allows functions in software and hardware components to be directly linked at link time, without requiring any modification or recompilation of the components. The type system is designed to be language agnostic, and exhibits higher-order features, to enables design patterns such as notifications and callbacks to software from within hardware functions. We demonstrate the system through a number of case studies which link compiled software against synthesised hardware in the Xilinx Zynq platform.
|Title of host publication||Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA '15)|
|Publisher||Association for Computing Machinery|
|Publication status||Published - 22 Feb 2015|
|Event||2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - Monterey, California, United Kingdom|
Duration: 22 Feb 2015 → 24 Feb 2015
|Conference||2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays|
|Period||22/02/15 → 24/02/15|
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- 1 Finished
A Higher Order approach to Codesign
Engineering & Physical Science Research Council
17/06/13 → 16/12/16
Project: Research Councils