Abstract
A modified linear feedback shift register (LFSR) is presented that reduces the number of transitions at the inputs of the circuit-under-test by 25% using a bit-swapping technique. Experimental results on ISCAS'85 and 89 benchmark circuits show up to 45% power reduction during test. They also show that the proposed design can be combined with other techniques to achieve a very substantial power reduction of up to 63%.
Original language | English |
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Pages (from-to) | 401-403 |
Number of pages | 3 |
Journal | Electronics Letters |
Volume | 44 |
Issue number | 6 |
DOIs | |
Publication status | Published - 1 Jan 2008 |