Avoiding leakage and synchronization attacks through enclave-side preemption control

Marcus Völp, Adam Lackorzynski, Jérémie Decouchant, Vincent Rahli, Francisco Rocha, Paulo Jorge Esteves Veríssimo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)


Intel SGX is the latest processor architecture promising secure code execution despite large, complex and hence potentially vulnerable legacy operating systems (OSs). However, two recent works identified vulnerabilities that allow an untrusted management OS to extract secret information from Intel SGX's enclaves, and to violate their integrity by exploiting concurrency bugs. In this work, we re-investigate delayed preemption (DP) in the context of Intel SGX. DP is a mechanism originally proposed for L4-family microkernels as disable-interrupt replacement. Recapitulating earlier results on language-based information-flow security, we illustrate the construction of leakage-free code for enclaves. However, as long as adversaries have fine-grained control over preemption timing, these solutions are impractical from a performance/complexity perspective. To overcome this, we resort to delayed preemption, and sketch a software implementation for hypervisors providing enclaves as well as a hardware extension for systems like SGX. Finally, we illustrate how static analyses for SGX may be extended to check confidentiality of preemption-delaying programs.
Original languageEnglish
Title of host publicationProceedings of the 1st Workshop on System Software for Trusted Execution, SysTEX@Middleware 2016, Trento, Italy, December 12, 2016
PublisherAssociation for Computing Machinery (ACM)
ISBN (Print)978-1-4503-4670-2
Publication statusPublished - 12 Dec 2016


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