24.1 Circuit challenges from cryptography

Ingrid Verbauwhede, Josep Balasch, Sujoy Sinha Roy, Anthony Van Herrewege

Research output: Chapter in Book/Report/Conference proceedingConference contribution

19 Citations (Scopus)


Implementing cryptography and security into integrated circuits is somehow similar to applications in other fields. We have to worry about comparable optimization goals: area, power, energy, throughput and/or latency. Moore's law helps to attain these goals. However, it also gives the attackers more computational power to break cryptographic algorithms. On top of this, quantum computers may become soon a reality, so that novel, very computationally demanding "post-quantum" cryptographic algorithms need implementation. Finally, there is a third dimension to the problem: implementations have to be resistant against physical attacks and countermeasures increase the cost. This paper demonstrates with actual data how these conflicting challenges are being addressed.
Original languageEnglish
Title of host publication2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers
PublisherIEEE Computer Society Press
Number of pages2
ISBN (Print)9781479962235
Publication statusPublished - 22 Feb 2015
Event2015 IEEE International Solid- State Circuits Conference - (ISSCC) - San Francisco, CA, USA
Duration: 22 Feb 201526 Feb 2015


Conference2015 IEEE International Solid- State Circuits Conference - (ISSCC)


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