Research output per year
Research output per year
Project Details
| Short title | An Intergrated Framework for Formal Vertification and Distributed Simulation of Asynchronous |
|---|---|
| Status | Finished |
| Effective start/end date | 1/09/03 → 31/08/06 |
Funding
- Engineering & Physical Science Research Council
Research output
- 2 Paper
-
Opportunities and Challenges in Process-algebraic Verification of Asynchronous Circuit Designs
Wang, X., Kwiatkowska, M., Theodoropoulos, G. & [No Value], [. V., 26 Jan 2006, p. 189-206. 18 p.Research output: Contribution to conference (unpublished) › Paper
4 Citations (Scopus) -
Towards a unifying CSP approach for hierarchical verification of asynchronous hardware. In Proceedings of 4th Workshop on Automated Verification of Critical Systems (AVoCS '04)
Wang, X., Kwiatkowska, M., Theodoropoulos, G. & Zhang, Q., 23 May 2005, p. 231-246. 16 p.Research output: Contribution to conference (unpublished) › Paper
8 Citations (Scopus)